This paper describes the implementation of the image rejection mixer block in the 5GHz frequency band using 0.18μm CMOS technology. The image rejection mixer block adopts the double-quadrature topology for high image-rejection ratio in the high frequency applications and is designed for the dual-conversion receiver. The loss of the polyphase filter in the signal path can be reduced with simple ...

This paper reports experimental results on a new class of single-chip multi-frequency channel-select filters based on self-coupled aluminum nitride (A1N) contour-mode piezoelectric resonators. For the first time, two-port AlN contour-mode resonators are connected in series and electrically coupled using their intrinsic capacitance to form multi-frequency (94 – 271 MHz), narrow bandwidth (~0.3%)...

A 2.4-GHz single-stage CMOS low noise amplifier (LNA) structure with ultra low power consumption is proposed. A current reuse technique is used to decrease power dissipation with increasing amplifier transconductance for the LNA. Thus, the same amplifier transconductance for the LNA will be achieved at decreased power dissipation. Also, due to the use of an inverter-type amplifier which has a s...

This paper presents the design and simulation of Low Noise Amplifier (LNA) in a 0.18μm CMOS technology. The LNA function is to amplify extremely low noise amplifier without adding noise and preserving required signal to noise ratio. Cadence design tool Spectre_RF is used to design and simulation based on resistors, inductors, capacitors and transistors. Power constrained methodology is used for...

A compact digitally-controlled single-stage variable gain amplifier (VGA) is introduced, which doubles the dB-linear range through the reconfiguration, saves power by 50% while maintaining the same linearity performance compared to those of the previous design. Implemented in 0.18 mm CMOS technology, the 5-bit digitally-controlled VGA achieves dB-linear gain range of 42 dB (221 to 21 dB) with g...

A VHF (30MHz-300MHz) band digitally programmable low noise amplifier (LNA) has been implemented with a 0.25um standard CMOS process for VHF CMMB mobile TV tuners. Utilizing a T-match input network, input matching of more than a decade bandwidth is achieved across all gain settings. Adopting the multiple gated technique, gain flatness enhancement and capacitor reuse etc., the proposed LNA demons...

A single chip 2.4GHz low power CMOS receiver and transmitter for WPAN applications are implemented and measured. The receiver uses a low-IF architecture with a polyphase filter and transistor linearization technique to improve linearity per power, and the transmitter adopts a ROM based direct-conversion architecture for low power consumption and high integrated density. Experimental results sho...

Abstract — A 5.2 GHz 1 dB conversion gain, IP1dB= -19 dBm and IIP3= -9 dBm double quadrature Gilbert downconversion mixer with polyphase filters is demonstrated by using 0.35 m SiGe HBT technology. The image rejection ratio is better than 47 dB when LO=5.17 GHz and IF is in the range of 15 MHz to 45 MHz. The Gilbert downconverter has fourstage RC-CR IF polyphase filters for image rejection. Pol...

In this paper we present a new circuit design for a 2.4GHz CMOS direct conversion mixer incorporating adaptive offset cancellation. The basic circuit structure is that of a Gilbert cell mixer. Offsets are cancelled by dynamically varying the bias on the loads, which are designed to provide constant impedance independent of the load cancellation current. The bias control is regulated via an adap...

This work details the optimization and evaluation of a CMOS low-noise amplifier by developing new algorithm for gm/ID approach combining with modified figure merit index method. The includes on-chip matching elements (such as IC inductors) resonance at targeted frequencies. simulation results optimized LNA model showed scattering parameter S21 = 19.91 dB, noise NF 3.54 dB excellent linearity th...