This paper proposes a new voltage control methodology using the particle swarm optimization (PSO) technique for smart grid loadability enhancement. The goal of this paper is to achieve reliable and efficient voltage profile/stability regulation in power grids. This methodology is based on the decouple power flow equations and the worst-case design technique. Specifically, the secondary voltage ...

A technique for low-voltage CMOS analog circuit design is presented in this paper. In this technique, voltage sources are added in series with the gates of the MOS transistors to lower the effective threshold voltages of the transistors. With the lowered effective threshold voltage, it is possible to build a host of analog circuit that operates with a decreased supply voltage. A 0.6V ultra-low ...

Enhancing compensating capability is essential in a voltage-sag compensator. It involves two main aspects, first, sag detection technique and second, voltage sag compensator. Many detection techniques have been introduced to measure and to detect voltage sag, such as RMSValue Evaluation and Peak-Value Evaluation. Unfortunately, most of the techniques require a delay for sag to be detected then ...

Direct tensile mechanical loading of an individual single-crystal BaTiO(3) nanowire was realized to reveal the direct piezoelectric effect in the nanowire. Periodic voltage generation from the nanowire was produced by a periodically varying tensile mechanical strain applied with a precision mechanical testing stage. The measured voltage generation from the nanowire was found to be directly prop...

In this paper, a new approach to enhance the bandwidth of flipped voltage follower is explored. The proposed approach is based on gate-body driven technique. This technique boosts the transconductance in a MOS transistor as both gate and body/bulk terminals are tied together and used as signal input. This novel technique appears as a good solution to merge the advantages of gate-driven and bulk...

In this paper, we propose a leakage reduction technique. Because high leakage currents in deep submicron regimes are becoming a major contributor to total power dissipation of CMOS circuits. Sub threshold leakage current plays a very important role in power dissipation. So to reduce the sub threshold leakage current we proposed an adaptive voltage level (AVL) technique. Which optimize the overa...

this paper presents a method for diagnosis of eccentricity fault in a switched-reluctance motor (srm) during offline and standstill modes. in this method, the fault signature is differential induced voltage (div) achieved by injecting diagnostic pulses to the motor windings. it will be demonstrated by means of results that there is a correlation between differential induced voltage and eccentri...

In this paper a new approach for design of class-AB current-mode square-root domain filters based on the electronically simulated translinear loop principle is presented. FG-MOS transistors that operate in strong inverted saturation region are employed for implementation of translinear loop circuit. The filter achieves immunity to body effect, low circuit complexity, large input dynamic ran...

This paper presents a method for diagnosis of eccentricity fault in a switched-reluctance motor (SRM) during offline and standstill modes. In this method, the fault signature is differential induced voltage (DIV) achieved by injecting diagnostic pulses to the motor windings. It will be demonstrated by means of results that there is a correlation between differential induced voltage and eccentri...