This report presents a new low latency, high resolution and low cost timing synchronization technique for digital receivers. Traditional timing synchronization employs Matched filter to perform cross-correlation operation and estimate Time-of-Arrival (TOA) of the signal. Decreasing the latency of the traditional method through oversampling leads to a higher complexity and it is not viable. Furt...

With the increased complexity of Very Large Scale Integrated (VLSI) circuits, Computer Aided Design (CAD) plays an even more important role. Top-down design methodology and layout of VLSI are reviewed. Moreover, previously published algorithms in CAD of VLSI design are outlined. In certain applications, Reed-Muller (RM) forms when implemented with AND/XOR or OR/XNOR logic have shown some attrac...

This paper presents anthraquinone and benzimidazole based hybrid molecular architect as the state of the art for multifunctional molecular logic circuits. The moleculator exhibits differential output behavior towards F(-), Zn(2+) and Cu(2+) ions to provide opportunities for elaboration of XOR, INHIBIT, XNOR, AND, OR, NOR, logic functions and their integrated logic functions half-adder, half-sub...

The versatile control of graphene's plasmonic modes via an external gate-voltage inspires us to design efficient electro-optical graphene plasmonic logic gates at the midinfrared wavelengths. We show that these devices are superior to the conventional optical logic gates because the former possess cut-off states and interferometric effects. Moreover, the designed six basic logic gates (i.e., NO...

We trained Binarized Neural Networks (BNNs) on the high resolution ImageNet ILSVRC-2102 dataset classification task and achieved a good performance. With a moderate size network of 13 layers, we obtained top-5 classification accuracy rate of 84.1 percent on validation set through network distillation, much better than previous published results of 73.2% on XNOR network and 69.1% on binarized Go...

Object detection algorithms using convolutional neural networks (CNNs) achieve high accuracy, but it is challenging to realize real-time object due their computational complexity, especially on resource-constrained mobile platforms. In this article, we propose an algorithm-hardware co-optimization approach designing a system. We first develop compact model based binarized network (BNN), which e...

Digital logic forms the functional basics of most modern electronic equipment and as such the creation of novel digital logic circuits is an active area of computer engineering research. This study demonstrates that genetic algorithms can be used to evolve functionally useful sets of logic gate interconnections to create useful digital logic circuits. The efficacy of this approach is illustrate...