We propose a two-qubit collisional phase gate that can be implemented with available atom chip technology, and present a detailed theoretical analysis of its performance. The gate is based on earlier phase gate schemes, but uses a qubit state pair with an experimentally demonstrated, very long coherence lifetime. Microwave near-fields play a key role in our implementation as a means to realize ...

Title of dissertation: QUANTUM GATE AND QUANTUM STATE PREPARATION THROUGH NEIGHBORING OPTIMAL CONTROL Yuchen Peng, Doctor of Philosophy, 2016 Dissertation directed by: Dr. Frank Gaitan Laboratory for Physical Sciences Professor Victor Yakovenko Department of Physics Successful implementation of fault-tolerant quantum computation on a system of qubits places severe demands on the hardware used t...

Among the list of major threats to quantum computation, decoherence poses one largest because it generates losses environment within a computational system which cannot be recovered via error correction methods. These methods require assumption that environmental interaction forces qubit state into some linear combination eigenstates. In reality, causes enter mixed where original is no longer r...

We design forward and backward fault-tolerant conversion circuits, which convert between the Steane code and the 15-qubit Reed–Muller quantum code so as to provide a universal transversal gate set. In our method, only seven out of a total 14 code stabilizers need to be measured, and we further enhance the circuit by simplifying some stabilizers; thus, we need only to measure eight weight-4 stab...

We design forward and backward fault-tolerant conversion circuits, which convert between the Steane code and the 15-qubit Reed–Muller quantum code so as to provide a universal transversal gate set. In our method, only seven out of a total 14 code stabilizers need to be measured, and we further enhance the circuit by simplifying some stabilizers; thus, we need only to measure eight weight-4 stab...

A binary decoder is a combinational logic circuit that converts a binary integer value to an associated pattern of output bits. They are used in a wide variety of applications, including data de-multiplexing, seven segment displays, and memory address decoding. This paper demonstrates the reversible logic synthesis for the n-to-2 n decoder, where n is the number of data bits. The circuits are d...

We consider fault-tolerant computation with formulas composed of noisy Boolean gates with two input wires. In our model all gates fail independently of each other and of the input. When a gate fails, it outputs the opposite of the correct output. It is known that if all gates fail with probability at least β2 = (3− √ 7)/4 ≈ 8.856%, faulttolerant computation is not possible. On the other hand, i...