This paper proposes a new double-edge-triggered implicitly level-converting flip-flop, suitable for a low-power and low-voltage design. The design employs a sense amplifier architecture to reduce the delay and power consumption. Experimentally, when implemented with a 130-nm, single-Vt and 0.84 V VDD process, it achieves 64% power-delay product (PDP) improvement, and moreover, 78% PDP improveme...

The pertinent choice of flip-flop topologies is an essential importance in the design of VLSI integrated circuits for high speed and high performance MODFET circuits. Understanding the suitability of flipflops and selecting the best topology for a given application is an important issue to fulfill the need of the design to satisfy low power and high performance circuit. This paper enumerates hi...

We describe measurements of the uniaxial magnetic anisotropy and spin-flop rotation Néel vector in antiferromagnetic CuMnAs thin films using neutron diffraction. The suppression (100) peak under fields is observed for as 20 nm, indicating that they undergo a transition. Good agreement found between diffraction electrical transport same layer with similar shape hysteresis obtained curves, while ...

A method to generate an all-optical flip-flop is proposed and experimentally demonstrated based on dynamic Brillouin gratings (DBGs) in polarization maintaining fibers. In a fiber with sufficiently uniform birefringence, this flip-flop can provide extremely long storage times and ultra-wide bandwidth. The experimental results demonstrate an all-optical flip-flop operation using phase-modulated ...

We demonstrate that 80 Gb/s data-packets can be all-optically switched into two different ports employing an optical wavelength converter controlled by a monolithically integrated optical flip-flop memory. The optical wavelength converter consists of a semiconductor optical amplifier and an optical filter. The integrated optical flip-flop exhibits single-mode operation, has 35 dB contrast ratio...

The digital hardware implementation of various fuzzy operations furthermore of fuzzy flip-flops has been the subject of intense study and application. The fuzzy D flip-flop derived from fuzzy J-K one is a single input single output unit with sigmoid transfer characteristics in some particular cases, proper to use as neuron in a Fuzzy Neural Networks (FNN). In this paper we propose the hardware ...

A reduced clock-swing flip-flop (RCSFF) is proposed, which is composed of a reduced swing clock driver and a special flip-flop which embodies the leak current cutoff mechanism. The RCSFF can reduce the clock system power of a VLSI down to one-third compared to the conventional flip-flop. This power improvement is achieved through the reduced clock swing down to 1 V. The area and the delay of th...

Healthy diets may lower oxidative stress and risk of chronic diseases. However, no previous studies examined associations between diet and fluorescent oxidation products (FlOP), a global marker of oxidative stress. We evaluated associations between healthy eating patterns (Alternative Healthy Eating Index (AHEI), Dietary Approach to Stop Hypertension (DASH), and Alternate Mediterranean Diet (aM...

In Integrated circuits a gargantuan portion of on chip power is expended by clocking systems, which comprises of timing elements such as flip-flops, latches and clock distribution network. These elements absorb approximately 30% to 60% of the total power dissipation in the system. In order to design high performance and power efficient circuits a scrupulous approach should be adopted to reduce ...

System on chip (SOC) design integrates many complex modules in one chip. As number of modules per chip is increasing, number of transistors in a chip increases resulting in increase in area and power dissipation. Area and power dissipation problems can be most effectively addressed if the basic building blocks of the circuit are designed for lower power dissipation and occupy less space. Flip-F...