<span>Wideband gap (WBG) semiconductors have developed rapidly in recent years, enabling greater efficiency and power density the design of electronics converters for several areas application. In this sense, work analyzes specificities silicon carbide (SiC) technologies their cascode topology (SiC-Cascode), operating at high switching frequencies. The are performed using a Boost converte...

This paper examines architectural techniques for providing concurrent error detection in self-timed VLSI pipelines. Signal pairs from Differential Cascode Voltage Switch Logic are compared with a checker that is composed of a tree of dual-rail (morphic) comparators to detect errors and signal completion. An efficient implementation is shown that compares favorably in speed and area with convent...

LNA with Current Reuse and Zero-Pole Cancellation Chunbao Ding, Wanrong Zhang, Dongyue Jin, Hongyun Xie, Pei Shen, Liang Chen, School of Electronic Information and Control Engineering, Beijing University of Technology, Beijing 100124, China Abstract—A low power cascode SiGe BiCMOS low noise amplifier (LNA) with current reuse and zero-pole cancellation is presented for ultra-wideband (UWB) appli...

The goal of internal frequency compensation of a low dropout voltage regulator (LDO) is the selection of a small-value, ESR-independent output capacitor. Cascode compensation formed by a common-gate transistor acting as a current buffer, an optional series resistor, and a compensation capacitor creates a dominant pole and a left-halfplane (LHP) zero, allowing adequate phase margin and stable LD...

Antenna arrays are of perennial interest and relevance to RF wireless system designers, indeed the rise of 5G is showing their importance is only growing. Most implementations of linear arrays use phase shifters to feed the array and hence form the main-lobe beam. In the 1960s, a technique using RF switches and Fourier analysis was discovered to be a viable alternative to phase shifters called ...

Abstract—This work presents a fully differential CMOS amplifier consisting of two self-biased gain boosted inverter stages, that provides an alternative to the power hungry operational amplifier. The selfbiasing avoids the use of external biasing circuitry, thus reduces the die area, design efforts, and power consumption. In the present work, regulated cascode technique has been employed for ga...