A DMA controller that operates in cycle-stealing mode transfers data by \stealing" bus cycles from an executing program. This cycle stealing operation retards the progress of the executing program and extends its execution time. In this paper we rst present a method that bounds the worst-case execution time of a program executing concurrently with a cycle-stealing DMA I/O operation in the simpl...

This paper displays an execution of versatile double current mode control (ADCMC) on non-altering buck-support converter. A confirmation of the converter operation with the proposed ADCMC has been performed in consistent state and amid the unsettling influences in the information voltage and the heap resistance and by presenting LC channels. The given recreation with LC channel can give prefera...

This paper describes a hierarchical scheduling, planning, control, and execution monitoring architecture for automating operations of a worldwide network of communications antennas. We describe the network automation problem and current mode of operations. We then describe a three layer hierarchical architecture for automating network operations. In particular we describe the notion of plan/sch...

Several simulators currently available that teach computer organization are described in [1, 2, 3]. There are also professional tools, such as debuggers, available for the development of assembly language programs. However, these tools are generally too sophisticated and complex to meet the special needs of introductory-level students. This paper describes an interactive visual learning environ...

In traditional operating systems, user programs suffer from the overhead of system calls because of transitions between the user mode and the kernel mode across their protection boundary. However, this overhead can be eliminated if the user programs can be executed safely inside the kernel mode. We achieve this effect by developing a safe kernel mode execution mechanism using TAL, Typed Assembl...

Modern embedded processors commonly use a set-associative scheme to reduce cache misses. However, a conventional set-associative cache has its drawbacks in terms of power consumption because it has to probe all ways to reduce the access time, although only the matched way is used. The energy spent in accessing the other ways is wasted, and the percentage of such energy will increase as cache as...

Chip multiprocessors (CMPs) aim to develop both instruction-level and thread-level parallelisms to boost a system’s performance. However, according to previous research results, CMPs outperform superscalar processors only in floating-point applications. Therefore, we have proposed a novel microprocessor, supporting two execution modes, to allow users to manually choose an appropriate mode to ex...

In this paper, a preemptive multi-objective multi-mode project scheduling model for resource investment problem is proposed. The first objective function is to minimize the completion time of project (makespan);the second objective function is to minimize the cost of using renewable resources. Non-renewable resources are also considered as parameters in this model. The preemption of activities ...

the aim of a multi-mode resource-constrained project scheduling problem (mrcpsp) is to assign resource(s) with the restricted capacity to an execution mode of activities by considering relationship constraints, to achieve pre-determined objective(s). these goals vary with managers or decision makers of any organization who should determine suitable objective(s) considering organization strategi...