This paper presents a method for increasing the operating frequency range of sub-6 GHz transmitter to millimetre wave (mm-wave) using two cascaded doublers. The usage such up-conversion approach is constrained since applying first doubler’s generated harmonics second doubler mm-wave signal creation, results in severe distortions and bandwidth expansion transmitted signal, limiting use method. W...

In this paper, we consider a one-dimensional dam-river system studied by Chentouf and Wang (SIAM J. Control Optim. 47: 2275–2302, 2008). Then, using the frequency multiplier method, we provide a simple and alternative proof of stabilization and regulation results obtained in the work cited above. Moreover, we relax the conditions on the feedback gains involved in the feedback law and give a par...

This paper presents a high speed binary floating point multiplier based on Hybrid Method. To improve speed multiplication of mantissa is done using Hybrid method replacing existing multipliers like Carry Save Multiplier, Dadda Multiplier and Modified Booth Multiplier. Hybrid method is a combination of Dadda Multiplier and Modified Radix-8 Booth Multiplier. The design achieves high speed with ma...

In this paper, we present flexible multiprecision multiplier that combined variable precision, parallel processing (PP), razor based dynamic voltage scaling (DVS), and dedicated MP operand scheduling to provide optimum performance for variety of operating conditions. All of the building blocks of proposed flexible multiplier can either work as independent small precision multiplier or parallel ...

A low-power and high-speed frequency multiplier for a delay-locked loop-based clock generator is proposed to generate a multiplied clock with different range of frequencies. The modified edge combiner consumes low power and achieves a high-speed operation. The proposed frequency multiplier overcomes a deterministic jitter problem by reducing the delay difference between positiveand negative-edg...

A family of frequency synthesizers is described. Each member of the family generates one of many equally-spaced frequencies by utilizing identical modules, the number of which is related to the number of possible frequencies. For any design in the family which uses frequency division in the modules, there exists a dual design which utilizes frequency multiplication. Block diagrams and formulas ...

A study and comparison between current mode CMOS analog multiplier, CMOS current mode multiplier/divider and high frequency four quadrant current multiplier has been carried out in this paper. Current multiplier has been simulated in SPICE with 0.35μm, 0.5μm. Simulation have been done with supply voltage of 3.3V, 1.5V and 1.55V respectively. The simulated results show that characteristic of mul...