This paper describes a CMOS analogy voltage supper buffer designed to have extremely low static current Consumption as well as high current drive capability. A new technique is used to reduce the leakage power of class-AB CMOS buffer circuits without affecting dynamic power dissipation. The name of applied technique is TRANSISTOR GATING TECHNIQUE, which gives the high speed buffer with the redu...

Leakage current promises to be a major contributor to power dissipation in future technologies. Bounding the maximum and minimum leakage current poses an important problem. Determining the maximum leakage ensures that the chip meets power dissipation constraints. Applying an input pattern that minimizes leakage allows extending battery life when the circuit is in stand-by mode. Finding such vec...

In this paper, the impact of gate induced drain leakage (GIDL) on the overall leakage of submicrometer VLSI circuits is studied. GIDL constitutes a serious constraint, with regards to off-state current, in scaled down complimentary metal–oxide–semiconductor (CMOS) devices for DRAM and/or EEPROM applications. Our research shows that the GIDL current is also a serious problem in scaled CMOS digit...

In this paper, the impact of gate induced drain leakage (GIDL) on overall leakage of submicron VLSI circuits is studied. GIDL constitutes a serious constraint, with regards to off-state current, in scaled down CMOS devices for DRAM and/or EEPROM applications. Our research shows that the GIDL current is also a serious problem in scaled CMOS digital VLSI circuits. We present the experimental and ...

The characteristics of the reverse leakage current of GaInN/GaN multiple quantum well light-emitting diodes (LEDs) are examined with various n-type GaN doping concentrations and interpreted by using a tunnelling current model. Changing the doping concentration of the n-type GaN influences the tunnelling probability of electrons into the conduction band and thus the reverse leakage current. Redu...

This paper proposes a new single phase transformerless Photovoltaic (PV) inverter for grid connected systems. It consists of six power switches, two diodes, one capacitor and filter at the output stage. The neutral of the grid is directly connected to the negative terminal of the source. This results in constant common mode voltage and zero leakage current. Model Predictive Controller (MPC) tec...

The relationship between theAgulhas Current and theAgulhas leakage is not well understood. Here, this is investigated using two basin-scale and two global ocean models of incrementally increasing resolution. The response of the Agulhas Current is evaluated under a series of sensitivity experiments, in which idealized anomalies, designed to geometrically modulate zonal trade wind stress, are app...

Temperature dependent measurements have been used to examine transport mechanisms and energy band structure in MOS devices. In this study, a comparison between high-k HfO2 dielectrics and conventional SiO2 dielectrics is made to investigate dielectric specific thermally activated mechanisms. Temperature dependent measurements on large area n/pMOSFETs composed of SiO2 and HfO2/SiO2 gate dielectr...

Memory has been facing several problems in which the leakage current is the most severe. Many techniques have been proposed to withstand leakage control such as power gating and ground gating. In this paper a new 8T SRAM cell, which adopts a single bit line scheme has been proposed to limit the leakage current as well as to gain high hold static noise margin. The proposed cell with low threshol...

The main purpose of this study is to analyze the current leakage of the power grid due to the change in speed of high-speed rail (HSR). First, using PSIM software as the fundamental basis, this study constructed an overall HSR circuit-based model system, including Scott transformer, auto-transformer, and the track equivalent circuit and grounding system. In addition, this paper sought to study ...