the input transitions at t = t 1 and t = f Z imply a pulse at the input port Il of the component. The mechanism is illustrated through an example presented subsequently. ns and the input signals at ports A and B. Although both of the input signals at A and B are logical 1 and 2 ns in width that is much larger than t p / h = 0.5 ns, the overlapping region where both inputs are high constitutes a...

An optical multistage interconnection network for optimal all-to-all personalized exchange, They propose an optical multistage interconnection network to realize an all-to-all personalized exchange that only requires one pass to send a message from each node to a different node (to realize a permutation). Hence, the new optical multistage interconnection network only requires n-1 passes for an ...

This paper presents a hybrid shared memory architecture which combines the scalability of a multistage interconnection network with the contention reduction benefits of coherent caches. We achieve this by replacing the memory modules and final stages of a multistage interconnection network with clusters of coherent caches. The performance of Cache Coherent Hybrid Interconnected Memory Extension...

The choice of an interconnection network for a parallel computer depends on a large number of performance factors which are very often application dependent. We propose a performance evaluation and a comparison methodology. This methodology is applied to a recently introduced class of interconnection networks (Multistage Chordal Ring Based multistage interconnection network). These networks are...

Benes and Clos networks are an important class of multistage interconnection network due to their expandability and modularity. In this article we present a survey of parallel routing algorithms in Benes and Clos Networks. These parallel routing algorithms are compared in terms of their interconnection topologies, implementation and time complexity. Index Terms : Multistage Interconnection netw...

Multistage interconnection networks are used in many applications ranging from connecting processors to memory modules in a parallel processing system, to high-speed network switches and routers. One of the major drawbacks in multistage networks is the lack of proximity concept. All nodes are at the same distance from any other node. In this paper, we propose a new hierarchical Multistage Netwo...

All-optical multistage interconnection networks are desirable for overcoming the limitations of optical signal regeneration in switching systems. We present a new implementation of the perfect-shuffle interconnection pattern that is coupled with an all-optical switching element, forming a complete stage of a multistage network. Switching is performed with birefringent calcite crystals and a fer...

Most previous work in the fault-tolerant design of multistage interconnection networks (MIN’s) has been based on improving the reliabilities of the networks themselves. For parallel systems containing a large number of processing elements (PE’s), the capability to recover from a PE fault is also important. The dynamic redundancy (DR) network is investigated in this paper. It can tolerate faults...