Advances in VLSI technology and processor architectures have resulted in a tremendous increase in processor speeds and memory capacities. However memory latencies have failed to improve as rapidly, making memory systems the performance limiters in most high performance processor architectures. Caching is a time-tested mechanism to solve this speed disparity. Among the different cache mapping or...

We introduce a novel preprocessing-based algorithm to solve the problem of determining the first arc of a shortest path in sparse graphs. Our algorithm achieves query running times on the 100 nanosecond scale, being significantly faster than state-of-the-art first-move oracles from the literature. Space consumption is competitive, due to a compression approach that rearranges rows and columns i...

We present the design and performance of a non-adaptive hardware system for data compression by arithmetic coding. The alphabet of the data source is the full 256-symbol ASCII character set, plus a non-ASCII end-ofle symbol. The key ideas of our system are the non-arithmetic representation of the current interval width, which yields improved coding e ciency in the interval-width update, and a r...

in this paper we introduce an improvement in the path planning algorithm for the humanoid soccer playing robot which uses ferguson splines and pso (particle swarm optimization). the objective of the algorithm is to find a path through other playing robots to the ball, which should be as short as possible and also safe enough. ferguson splines create preliminary paths using random generated para...