This paper presents a current re-use quadrature front end receiver architecture for ISM Band. The proposed architecture is a stacked QLMV cell which consists of a low-noise amplifier (LNA), mixer and voltage-controlled oscillator (VCO), which feeds into the intermediate frequency (IF) load. The LNA is a common source amplifier with Ls source degeneration, a double-balanced Gilbert cell mixer an...

WREN d-e signals are to be amplified, the usual approach is to use a direct-coupled circuit. The difficulty of maintaining sufficiently low drift in a direct-coupled configu ration led to the development of chopper and chopper-stabilized circuits, where a mechanical chopper reduces drift to low values. Unfortunately, other shortcomings arise, and in most applications the direct-coupled d-e ampl...

With the device models presented in chapter 2 and the simulation techniques presented in chapter 3, SAMOC can analyze DC solutions of MOS circuits. In order to test the models and the simulation techniques, some simple circuits are selected to be analyzed by SAMOC. One of the most important circuit parts in analog CMOS circuit design is the differential amplifier. A differential amplifier is us...

Problem statement: Pipelined architecture is considered to be the most suitable for highspeed and high-resolution applications among varies Nyquist Analogue to Digital Converters (ADCs) in nowadays digital signal processing domain. But the pipeline power consumption is growing with the technology scaling. For a pipeline ADC with high speed and high resolution, the fore-end track and hold amplif...

Sense amplifiers plays an important role in memories like Dynamic Random Access (DRAM) and Static Random Access (SRAM) for read and write operations. A sense amplifier compares the bit line voltage and its complement amplifies it to rail to rail output voltages. In this project, we mainly concentrated on the write operation. Sense amplifier is one of the peripheral circuits in memories that are...

The present paper Performance improvement in high speed low power out put Buffer amplifier for large –LCD applications. The proposed buffer achieves high-speed driving performance while drawing a low quiescent current during static operation. The circuit offers enhanced slewing capabilities with limited power consumption by exploiting a slew detector which monitors the output voltage of the inp...

In this review article, a stage-convertible RF power amplifier designed with a 0.18-m RF CMOS process is described. A method to implement a low-power matching network is an essential technology for the stage-convertible power amplifier. Various low-power matching networks with distributed active transformers as an output power combiner are compared in terms of the amounts of undesired coupling...