As highly-parallel accelerators such as graphics processing units become more important in high-performance computing, so does the need to ensure their reliable operation. In response, research has been directed at several efforts to characterize and understand the hardware vulnerability of GPU microarchitecture structures, as well as to detectng and correcting such vulnerabilities. In this pos...

In this paper we present how Cellular Automata model can be implemented for processing on Graphics Processing Unit (GPU). Recently, graphics processors have gained a lot of interest as an efficient architecture for general-purpose computation. Cellular Automata algorithms that are inherently parallel give the opportunity to achieve very high efficiency when they are implemented on GPUs. We demo...

We present a novel hardware implementation of the double affine Smith-Waterman (DASW) algorithm, which uses dynamic programming to compare and align genomic sequences such as DNA and proteins. We implement DASW on a commodity graphics card, taking advantage of the general purpose programmability of the graphics processing unit to leverage its cheap parallel processing power. The results demonst...

Since the late 1990s, developers have been pushing graphics hardware to its limits, trying to create photorealistic environments in their games similar to those seen in recent blockbuster movies such as The IncrediblesTM. The need for graphics accelerators is becoming more apparent every day, as millions of calculations need to be done to render the complex scenes within games. There have been ...

In this study we test the idea of using a graphics processing unit (GPU) as an embedded co-processor for real-time speed-limit sign detection. We implement a system that operates in real-time within the computational limits of contemporary embedded general-purpose processors. The input to the system is a set of grayscale videos recorded from a camera mounted in a vehicle. We implement a new tec...