In this paper, we present a simulated annealing (SA) and a genetic algorithm (GA) based on heuristics for scheduling problem of jobs in virtual cellular manufacturing systems. A virtual manufacturing cell (VMC) is a group of resources that is dedicated to the manufacturing of a part family. Although this grouping is not reflected in the physical structure of the manufacturing system, but machin...

As the density of VLSI circuits increases, it becomes attractive to integrate dedicated test logic on a chip. This Built-in Self-Test (BIST) approach not only offers economic benefits but also interesting technical opportunities with respect to hierarchical testing and the reuse of test logic during the application of the circuit. Starting with an overview on test problems, test applications an...

A multiple-valued logic-in-memory VLSI using ferroelectric capacitors is proposed to realize an arithmeticoriented VLSI with real-time programmable capacitor storage. The use of a remnant-polarization charge on a ferroelectric capacitor makes it possible to perform not only a real-time programmable storage function, but also a linearsum function, thereby resulting in a compact hardware while ma...

Built-In Self-Test (BIST) techniques constitute an attractive and practical solution to the problem of testing VLSI circuits and systems. Input vector monitoring concurrent BIST schemes perform testing concurrently with the operation of the circuit. In this paper a novel input vector monitoring concurrent BIST scheme is presented that compares favorably to previously proposed schemes with respe...

In modern high-throughput data analysis, researchers perform a large number of statistical tests, expecting to find perhaps a small fraction of significant effects against a predominantly null background. Higher Criticism (HC) was introduced to determine whether there are any nonzero effects; more recently, it was applied to feature selection, where it provides a method for selecting useful pre...