introduction: recent studies suggest that glucocorticoids modulate memory reconsolidation. moreover, cholinergic system is involved in memory reconsolidation. since glucocorticoids interact with brain cholinergic system in modulating memory processing, we investigated whether glucocorticoid influences on the reconsolidation of emotionally arousing training depend on the cholinergic system. meth...

This paper presents the implementation of March Algorithm based Memory Built-In Self Test (MBIST) architecture for Static Random Access Memory (SRAM). A Finite State Machine (FSM) is designed to implement March – based Test algorithm. Also SRAM block and the interfacing modules are presented. There is a standard March Test Algorithm with 22N where N is the number of memory words, read/write ope...

A novel approach based on a branch and bound technique is presented for transformation of logical memories to map-pable physical memories while speciied parameters such as area, delay, memory test time and test strategy are satis-ed. The proposed algorithm uses the new test parameters to realize a logical memory with a set of physical memories which could be tested within the speciied test time...

The design and architecture of a memory test synthesis framework for automatic generation, insertion and veriication of memory BIST units is presented. We use a building block architecture which results in full customization of memory BIST units. The exibility and eeciency of the framework are demonstrated by showing that memory BIST units with diierent architecture and characteristics could be...

Abstract In this paper, a novel technique based on fuzzy method is presented for chaotic nonlinear time series prediction. Fuzzy approach with the gradient learning algorithm and methods constitutes the main components of this method. This learning process in this method is similar to conventional gradient descent learning process, except that the input patterns and parameters are stored in mem...

We present a novel test architecture which combines IEEE 1149.1 Boundary-Scan with a Memory Built-In Self-Test. The TDI pin is used for serially shifting in the test data into a test data register which is connected to the memory. The finite state machine of the TAP controller performs the memory test algorithm. The test response is shifted out via the TDO pin for off-chip analyses. The test ar...

This paper presents the implementation of online test scheme for RFID memories based on Memory Built in Self Test (MBIST) architecture. This paper also presents the, Symmetric transparent version of March SS algorithm, implementation of Memory BIST. The comparison between the different march algorithms and the advantage of the March SS algorithm over all other is also presented. The solution wa...

objectives: this study examined the relationship between working and short-term memory performance, and their effects on cochlear implant outcomes (speech perception and speech production) in cochlear implanted children aged 7-13 years. the study also compared the memory performance of cochlear implanted children with their normal hearing peers. methods: thirty-one cochlear implanted children w...