There is increased interest in the use of graphics processing units (GPUs) for general purpose computation. This is because GPUs are almost two orders of magnitude faster in terms of floating point throughput compared to conventional CPUs. In this paper we investigate the use of graphics processing units for accelerating signal processing algorithms, specifically FIR filters and the FFT. We des...

Many current general purpose processors use extensions to the instruction set architecture to enhance the performance of digital image processing and multimedia applications. In this paper, a MATLAB Application Program Interface (API) is constructed for the performance evaluation of Intel image processing functions. The Intel image processing functions are constructed for high performance opera...

The newly introduced Microprocessor Architecture for Java Computing (MAJC) supports parallelism in a hierarchy of levels: multiprocessors on chip,vertical micro threading, instruction level parallelism via a very long instruction word architecture (VLIW) and SIMD. The rst implementation, MAJC-5200, includes some key features of MAJC to realize a high performance multimedia processor. Two CPUs r...

Most of modern embedded systems for multimedia and network applications are based on parallel data stream processing. The data processing can be done using very long instruction word processors (VLIW), or using more than one high performance application-specific instruction set processor (ASIPs), or even by their combination on single chip. Design and testing of these complex systems is time-co...

This paper presents preliminary results on the design of an Object Coprocessor (OCP) cooperating with a RISC– architecture processor (ARM7, by Advanced RISC Machines Ltd.). This coprocessor implements in hardware some low–level processing and control steps required by the object–oriented model. The processor and the OCP constitute a processing architecture whose extended instruction set feature...

Providing quality mobile video applications in hand-held mobile devices requires increased computational capability. Using Single Instruction Multiple Data (SIMD) techniques to expose and accelerate the data parallelism inherent in video processing increases performance in handheld and wireless systems. The paper introduces a new 64-bit SIMD coprocessor of the Intel©R XScale©R microarchitecture...

Application specific instruction set processors (ASIPs) recently became more important to overcome compute bottlenecks in digital signal processing systems with tight power constraints. Within the last years commercial tools like the LISATek framework came up, that allow to design ASIP architectures by using their own description language. It shortens the design cycle dramatically compared to c...

Dichotic listening to verbal stimuli results in a right ear advantage (REA), indicating a left hemisphere processing superiority. The magnitude of the REA can be modulated by instructions to direct attention to the left or right ear stimulus. A previous study from our laboratory showed that presenting a prime syllable before the presentation of the dichotic syllables increases reports of the no...