This paper proposes a novel genetic-based high-level synthesis methodology for ΣΔ modulators. This approach is based on simulation-based optimisation where optimal topology of the ΣΔ modulator is automated explored using a genetic algorithm(GA) under various design constraints, such as SNR(Signalto-Noise Ratio) and hardware complexity. The proposed synthesis technique has been implemented in Sy...

This paper presents a new approach to hierarchical high-level synthesis with respect to internal register-transfer structures of complex components. Entire subdesigns can efficiently be used as complex components at a higher hierarchical level of the design. After synthesis, the calculated schedule of each subdesign is added to its register-transfer component model. This enables the sharing of ...

The last two decades have seen tremendous effort on the development of high-level synthesis algorithms for efficient realization of the multiplication of a variable by a set of constants using only addition, subtraction, and shift operations. These algorithms generally target the minimization of the number of adders and subtractors, assuming that shifts are realized using only wires due to the ...

The increasing demand for portable computing has elevated power consumption to be one of the most critical design parameters. A high-level synthesis system, HYPER-LP, is presented for minimizing power consumption in application specific datapath intensive CMOS circuits using a variety of architectural and computational transformations. The synthesis environment consists of high-level estimation...

A hierarchical register allocation approach in high-level synthesis is presented. First, we accomplish the trivial register allocation and then we attempt to optimize the number of required registers. In this work, we extend conventional register allocation algorithms to handle behavioral descriptions containing conditional branches and loops. However, in our approach the register optimization ...