Nowadays, network-on-chip (NoC) systems are becoming more popular due to their big advantages when compare with systems-on-chip (SoC). Therefore, an increasing number of researchers and organizations now focus on the study and development of NoC techniques. As a result, so far many achievements have been gained. Furthermore, considering the dominant position of wireless and the weakness of wire...

Network-on-chip (NoC) performance largely depends on the underlying deadlock-free and efficient routing algorithm. The effectiveness of any adaptive routing algorithm strongly depends on the underlying selection strategy. When the routing function returns a set of admissible output channels with cardinality greater than one, a selection function is used to select the output channel to which the...

We propose 3D mesh-based optical network-onchip (ONoC) based on a novel low-cost 6x6 optical router, and quantitatively analyze thermal effects on the 3D ONoC. Evaluation results show that with the traditional thermal tuning technique using microheater, the average power efficiency of the 3D ONoC is about 2.7pJ/bit, while chip temperature varies spatially between 55C and 85C. In comparison, a n...

A conventional Network-on-Chip (NoC) router uses input buffers to store in-flight packets. These buffers improve performance, but consume significant power. It is possible to bypass these buffers when they are empty, reducing dynamic power, but static buffer power remains, and when buffers are utilized, dynamic buffer power remains as well. To improve energy efficiency, bufferless deflection ro...

Network-on-Chip (NoC) has recently emerged as an efficient communication solution for the System-on-Chip (SoC) design. Design space exploration and performance evaluation are the most essential task in NoC design. In this paper, an ABC based design space exploration framework for the NoC design is proposed. The objective of the design space exploration is to minimize the total energy consumptio...

The Network on Chip (NoC) paradigm is rapidly replacing bus based System on Chip (SoC) designs due to their inherent disadvantages such as non-scalability, saturation and congestion. Currently very few tools are available for the simulation and evaluation of on-chip architectures. This study proposes a generic object oriented model for performance evaluation of on-chip interconnect architecture...

To achieve the goal of scientific literacy, besides conveying science and technology concepts, cultivating students’ modeling ability has become important. However, in-service teachers face the difficulty that their teaching load increases while they are still bound by limited teaching hours. Teachers may know of modeling ability, life related content and hands-on activities which are all impor...